Implementation of Complex Division Custom Instruction Hardware on Nios-II Processor
نویسندگان
چکیده
As increasing the clock frequency leads to unmanageable heat and power dissipation the search is on for another way to get more power efficient and faster embedded systems. Given that chip area is also a constraint, we investigate the addition of a custom instruction to the processor instruction set which enables the execution of an efficient complex division. We have implemented software for complex floating point division using the custom instructions added.
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